The present invention is directed to semiconductor packaging and, more particularly, to a package-on-package structure.
Package-on-package devices are often necessary for applications that must integrate two or more functional devices. Unfortunately, most conventional package-on-package methods require the formations of vias in the molded packages to connect the devices. This can present numerous technological challenges. Such methods are also not suitable for stacking land grid array (LGA) packages, quad flat no leads (QFN) packages, and the like.
It is therefore desirable to provide a package-on-package device that uses a simple, low cost method, and which is suitable for all types of packages.